RDA Cataloging for E-Resource Originals of UMass Dissertations and Theses

The following are instructions for cataloging e-resource dissertations and theses which are “born digital”, that is, are not reproductions of print copies. If the e-resource is a reproduction, see the instructions in RDA Cataloging for E-Resource Reproductions of UMass Print Dissertations and Theses.

Information for the new cataloging record should be derived from the Scholarworks metadata page (abstract, keywords), the PDF copy downloaded via Scholarworks (title, author, pagination, illustrations information) and the “packing list” provided by the Graduate School office (degree program, year of birth). Campus and Open access information is provided either by the Grad School office or the metadata page itself.

After a catalog record is created it is uploaded into OCLC then exported into ALEPH. The 856 field should be deleted from the bibliographic record and inserted into the Holdings record. Use the following item record fields: In the General Information (1) - UMDUB, UWWW, EBOOK, Item Status 4; in General Information(2), Statistic 09.

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Field Subfield Syntaxes
Fixed Fields Type = a
BLvl = m
Ctry = mau
Form = o
Cont = b m
Desc = i
Ills = [as needed]
DtSt = s
Dates = <year of degree>
006 Byte 00 = “m”
Byte =6 = “o”
Byte 09 = “d”
007 $a c $b r $d <b, c or m> $h [b=b&w, c=multicolor, m=b&w and color]
040 AUM $b eng $e rda $c AUM
043 [Optional, use as needed]
100 1_ <Form of author name from title page>, $d <birth year>- $e author.
245 10 <Title from title page> <: $b subtitle> / $c by <author name on title page>
246 3_ [Optional portion (indicators 30) or variant of title (indicators3_)]
264 _1 Amherst, Massachusetts : $b University of Massachusetts Amherst, $c <[year e-resource appeared in Scholarworks]>
264 _4 $c c<year of degree> NOTE: Must use copyright symbol
300 1 online resource (<number> pages) : $b illustrations [if present]
336 text $b txt $2 rdacontent
337 computer $b c $2 rdamedia
338 online resource $b cr $2 rdacarrier
347 text file $b PDF $2 rda
502 $b Ph. D. [or Ed. D.] $c University of Massachusetts Amherst $d <year of degree> [Use appropriate degree abbreviations for theses, i.e., M.S.]
506 0_ Open access. [Or 506 1_ Restricted to the UMass community.]
538 Available online in PDF format via Scholarworks at UMass Amherst
500 Degree in <program name> from the University of Massachusetts Amherst.
504 Includes bibliographical references (pages <nbr>-<nbr>).
520 3_ <abstract>
653 <author-supplied keywords>
650 _0 <subject headings>
690 Theses $x <degree program> $x Doctoral. [or Masters.]
700 1_ <Name of advisor> $e degree supervisor.
710 2_ University of Massachusetts Amherst. $b <Department name> [use authority record form of name]
710 2_ University of Massachusetts Amherst, $e degree granting institution.
710 2_ University of Massachusetts Amherst. $b Library, $e issuing body.
856 41 $u <URL for e-resource copy> $z Connect to this title
910 <initials> <mm/dd/yyyy>

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SAMPLE RECORD
006 m o d
007 c $b r $d b $h a
040 AUM $b eng $e rda $c AUM
100 1_ Ahmad, Tariq Bashir, $d 1977- $e author.
245 10 Parallel multi-core Verilog HDL simulation / $c by Tariq Bashir Ahmad.
264 _1 Amherst, Massachusetts : $b University of Massachusetts Amherst, $c [2014]
264 _4 $c c2014
300 1 online resource (xvi, 122 pages) : $b illustrations (some color)
336 text $b txt $2 rdacontent
337 computer $b c $2 rdamedia
338 online resource $b cr $2 rdacarrier
337 text file $b PDF $2 rda
502 $b Ph. D. $c University of Massachusetts Amherst $d 2014
506 0_ Open access.
538 Available online in PDF format via Scholarworks at UMass Amherst.
500 Degree in Electrical and Computer Engineering from the University of Massachusetts Amherst.
504 Includes bibliographical references (pages 333-352).
520 3_ In the era of multi-core computing, the push for creating true parallel applications that can run on individual CPUs is on the rise. Application of parallel discrete event simulation (PDES) to hardware design verification looks promising, given the complexity of today's hardware designs. Unfortunately, the challenges imposed by lack of inherent parallelism, suboptimal design partitioning, synchronization and communication overhead, and load balancing, render this approach largely ineffective. This thesis presents three techniques for accelerating simulation at three levels of abstraction namely, RTL, functional gate-level (zero-delay) and gate-level timing. We review contemporary solutions and then propose new ways of speeding up simulation at the three levels of abstraction. We demonstrate the effectiveness of the proposed approaches on several industrial hardware designs.
650 0 Computer engineering.
650 0 Digital electronics.
650 0 Verilog (Computer hardware description language)
690 Theses $x Electrical and Computer Engineering $x Doctoral.
700 1 Ciesielski, Maciej, $e degree supervisor.
710 2 University of Massachusetts Amherst. $b Department of Electrical & Computer Engineering.
710 2 University of Massachusetts Amherst, $e degree granting institution
710 2 University of Massachusetts Amherst. $b Library, $e issuing body
856 41 $u http://scholarworks.umass.edu/dissertations_2/45/ $z Connect to this title
910 kbd 09/02/2014

Contact person: Kay Dion

rda_cataloging_for_e-resource_originals_of_umass_dissertations_and_theses.txt · Last modified: 2015/05/13 14:36 (external edit)
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